1. Field of the Invention
The present invention relates to a power-supply voltage frequency control circuit for controlling a clock frequency of a system clock and a power-supply voltage to be supplied to a target circuit receiving the supply of a predetermined power-supply voltage and performing predetermined processing in synchronization with a system clock.
2. Description of the Related Art
The power consumption of an electronic circuit system is proportional to the clock frequency and the square of a power-supply voltage. Thus, by changing the clock frequency in accordance with a load of tasks to be processed based on the operating state of the system and supplying power-supply voltage in accordance thereto, the power consumption can be reduced.
Specifically, when the load is heavy, that is, when there are many tasks for the target circuit to process, a high power-supply voltage VDD is supplied and a high speed clock frequency is switched to.
When the load is light, that is, when there are few tasks for the target circuit to process, a low speed clock frequency is switched to and a low power-supply voltage VDD is supplied.
For example, when the lower limit power-supply voltage VDD able to assure operation of the target circuit at the time of a clock frequency f of f1 is V1 and the lower limit power-supply voltage VDD able to assure operation of the target circuit at the time of a clock frequency f of f2 ( less than f1) is V2 ( less than V1), a power-supply voltage VDD of V1 or more is supplied when the system clock frequency f is f1, while a power-supply voltage VDD of V2 or more is supplied when the system clock frequency f is f1 which is lower than f2.
By doing this, excessive power consumption can be suppressed.
However, a certain period of time is necessary to change the power-supply voltage VDD. For example, as shown in FIG. 18A to FIG. 18C, up until the time T1 when the power-supply voltage VDD is converged to V1, a clock of a frequency f1 is supplied to the target circuit, but a power-supply voltage VDD for assuring the operation thereof is not supplied, so the operation of the target circuit is not assured.
Accordingly, as explained above, in the electronic circuit system of the related art, there is the disadvantage that sometimes the operation cannot be assured when operating the system while switching the frequency.
Also, when changing the clock frequency in accordance with the load of tasks to be processed by the target circuit based on an operating state of the system as explained above and supplying a power-source voltage VDD in accordance thereto, a CPU or other control circuit gives an instruction every time, whereby a clock supply circuit capable of supplying a clock of a variable clock frequency or a power-supply circuit capable of supplying a variable power-source voltage changes the clock frequency f and the power-supply voltage VDD.
In this case, the CPU is generally configured to give an instruction at a predetermined time. To the predetermined time, however, interruption processing by a timer becomes necessary. In this case, the CPU suspends the processing of the tasks it should be performing.
Accordingly, in an electronic circuit system of the related art, when controlling the clock frequency and power-supply voltage in accordance with a fixed schedule, there is the disadvantage that the processing of tasks is suspended each time and an overhead of processing for sending instructions to the clock supply circuit and the power-supply voltage supply circuit occurs.
A first object of the present invention is to provide a power-supply voltage frequency control circuit capable of assuring operation of a target circuit when changing a clock frequency in accordance with a load of tasks to be processed and supplying a power-supply voltage in accordance thereto.
A second object of the present invention is to provide a power-supply voltage frequency control circuit capable of suppressing an occurrence of overhead in processing and reducing processing of a control system of a target circuit when controlling a clock frequency and a power-supply voltage in accordance with a fixed schedule.
To attain the above objects, according to a first aspect of the present invention, there is provided a power-supply voltage frequency control circuit comprising a clock supply circuit capable of supplying system clocks of a plurality of clock frequencies and supplying a system clock having a clock frequency in accordance with a first control signal to a target circuit performing processing in synchronization with the system clock; a power-supply voltage supply circuit for supplying a power-supply voltage of a value in accordance with a second control signal to the target circuit; and a control means for, when giving an instruction for raising the frequency, instructing the power-supply voltage supply circuit by the second control signal to raise the power-supply voltage in advance to one by which operation of the system can be assured for the frequency to be changed to next and then instructing the clock supply circuit by the first control signal to raise the frequency.
Preferably, the control means, when giving an instruction for lowering the frequency, instructs the clock supply circuit by the first control signal to lower the frequency and instructs the power-supply voltage supply circuit by the second signal to lower the power-supply voltage to one by which operation of the system can be assured for the frequency to be changed.
According to a second aspect of the present invention, there is provided a power-supply voltage frequency control circuit comprising a clock supply circuit capable of supplying system clocks of a plurality of clock frequencies and supplying a system clock of a clock frequency in accordance with a first control signal to a target circuit performing processing in synchronization with the system clock; a power-supply voltage supply circuit for supplying a power-supply voltage of a value in accordance with a second control signal to the target circuit; and a control means for outputting the first control signal to the clock supply circuit and outputting the second control signal to the power-supply voltage supply circuit by following an instruction of a frequency change value and change time from the target circuit.
Preferably, the control means calculates a power-supply voltage value to be supplied to the target circuit from the frequency change value instructed by the target circuit and instructs the power-supply voltage supply circuit by the second control signal.
Alternatively, the control means has a table of the relationship of a frequency value of a system clock to be supplied to the target circuit and a power-supply voltage value to be supplied to the target circuit, selects a voltage in accordance with an instructed frequency value, and instructs the power-supply voltage supply circuit by the second control signal.
Alternatively, the control means performs a frequency-voltage conversion from an instructed frequency value of a system clock to be supplied to the target circuit and instructs a power-supply voltage value obtained by the conversion to the power-supply voltage supply circuit by the second control signal.
Alternatively, the circuit further comprises a timer able to be set with a time to be clocked by the control means and outputting a coincidence signal clocking the set time, and the control means sets a frequency change time instructed by the target circuit to the timer and outputs the first control signal to the clock supply circuit when receiving as an input the coincidence signal from the timer.
Alternatively, the control means compares a frequency of the clock supplied by the clock supply circuit with the frequency change value instructed by the target circuit, judges whether to raise or lower the frequency in accordance with the comparison result, and instructs the clock supply circuit by the first control signal.
More preferably, when judging to raise the frequency, the control means outputs to the power-supply voltage supply circuit the second control signal to raise the power-supply voltage at an earlier time than an instructed time and outputs to the clock supply circuit the first control signal to raise the system clock frequency to an instructed frequency value at the instructed time.
Alternatively, when judging to lower the frequency, at an instructed time, the control means outputs to the clock supply circuit the first control signal to lower the system clock frequency to an instructed frequency value and outputs to the power-supply voltage supply circuit the second control signal to lower the power-supply voltage.
Alternatively, the control means outputs to the power-supply voltage supply circuit the second control signal to raise the power-supply voltage at an earlier time than an instructed time and outputs to the clock supply circuit the first control signal to raise the system clock frequency to an instructed frequency value at an instructed time when judging to raise the frequency, while outputs to the clock supply circuit the first control signal to lower the system clock frequency to an instructed frequency value at an instructed time and outputs to the power-supply voltage supply circuit the second control signal to lower the power-supply voltage when judging to lower the frequency.
More preferably, the circuit further comprises a timer able to be set with a time to be clocked by the control means and outputting a coincidence signal for clocking the set time, and the control means calculates a time to raise the power-supply voltage from a time of raising the frequency, sets a time based on the calculated time to the timer, and outputs the second control signal to the power-supply voltage supply circuit when receiving as an input the coincidence signal from the timer.
According to a third aspect of the present invention, there is provided a power-supply voltage frequency circuit comprising a frequency-voltage conversion circuit for judging whether a power-supply voltage is high or low relative to a supplied clock frequency and outputting a voltage instruction signal to instruct to lower the power-supply voltage when higher and to raise it when lower; a control means for outputting a control signal to instruct a frequency change in accordance with an instruction of the frequency change value; a clock supply circuit capable of supplying system clocks of a plurality of clock frequencies and supplying a system clock of a clock frequency in accordance with the control signal separately to a target circuit for performing processing in synchronization with the system clock and to the frequency-voltage conversion circuit; and a power-supply voltage supply circuit for supplying a power-supply voltage in accordance with the voltage instruction signal to the target circuit and frequency-voltage conversion circuit.
Preferably, when receiving an instruction to raise the frequency, the control means instructs the clock supply circuit by the control signal to raise a clock frequency to be supplied to the frequency-voltage conversion circuit and to raise a clock frequency to be supplied to the target circuit after the elapse of a time sufficient time for the power-supply voltage to rise.
Alternatively, when receiving an instruction to lower the frequency, the control means instructs the clock supply circuit by the control signal to lower the clock frequency to be supplied to the target circuit and then to lower the clock frequency to be supplied to the frequency-voltage conversion circuit.
Alternatively, when receiving an instruction to lower the frequency, the control means instructs the clock supply circuit by the control signal to simultaneously lower the clock frequency to be supplied to the frequency-voltage conversion circuit and the clock frequency to be supplied to the target circuit.
Alternatively, the control means instructs the clock supply circuit by the control signal to raise the clock frequency to be supplied to the frequency-voltage conversion circuit and to supply to the target circuit after the elapse of a time sufficient for the power-supply voltage to rise when receiving an instruction to raise the frequency and instructs the clock supply circuit by the control signal to lower the clock frequency to be supplied to the target circuit and then to lower the clock frequency to be supplied to the frequency-voltage conversion circuit when receiving an instruction to lower the frequency.
Alternatively, the control means instructs the clock supply circuit by the control signal to raise the clock frequency to be supplied to the frequency-voltage conversion circuit and to raise the clock frequency to be supplied to the target circuit after the elapse of a time sufficient for the power-supply voltage to rise when receiving an instruction to raise the frequency and instructs the clock supply circuit by the control signal to simultaneously lower the clock frequency to be supplied to the frequency-voltage conversion circuit and the clock frequency to be supplied to the target circuit when receiving an instruction to lower the frequency.
More preferably, the circuit further comprises a timer able to be set with time to be clocked by the control means and for outputting a coincidence signal for clocking the set time, and the control means calculates a time to raise the power-supply voltage from a time of raising the frequency, sets a time based on the calculated time at the timer, and instructs the clock frequency circuit by the control signal to raise the clock frequency to be supplied to the target circuit when receiving as an input the coincidence signal from the timer.
Alternatively, the control means detects that the power-supply voltage has risen, confirms that the power-supply voltage has risen, then instructs the clock supply circuit by the control signal to raise the clock frequency to be supplied to the target circuit.
More preferably, the circuit further comprises a timer able to be set with time to be clocked by the control means and outputting a coincidence signal clocking the set time, and the control means calculates a time to raise the power-supply voltage from a time of raising the frequency, sets a time based on the calculated time to the timer, receives as input the coincidence signal from the timer, detects that the power-supply voltage has risen, confirms that the power-supply voltage has risen, then instructs the clock supply circuit by the control signal to raise the clock frequency to be supplied to the target circuit.
According to the present invention, for example, when instructing to raise the frequency, the control means instructs the power-source voltage supply circuit by the second control signal to raise the power-supply voltage in advance to one capable of assuring operation of the system for the frequency to be changed to next, then instructs the clock supply circuit by the first control signal to raise the frequency.
Namely, the control means also considers the setup time required for the power-supply voltage supply circuit to change the power-supply voltage. When switching from a low frequency to a high frequency, it instructs the power-supply voltage supply circuit by the second control signal to raise the power-supply voltage to one in accordance with the high frequency at a point earlier from that timing by exactly the setup time.
Also, when instructing to lower the frequency, the control means instructs the clock supply circuit by the first control signal to lower the frequency and instructs the power-supply voltage supply circuit by the second control signal to lower the power-supply voltage to one capable of assuring operation of the system for the frequency to be changed to next.
Accordingly, the system operation can be assured even when switching the frequency.
Also, according to the present invention, for example, when lowering the system clock frequency at a predetermined time, a target circuit supplies a frequency change instruction including time information to the control means.
When the control means receives a frequency change instruction from the target circuit, it judges whether to perform an operation for increasing (raising) the frequency or an operation for decreasing (lowering) the frequency from the frequency instructed by the target circuit.
In this case, it judges the change is one for lowering the current frequency.
The control means finds the power-supply voltage value to be supplied to the target circuit from the instructed frequency value and, for example, sets a time to lower the frequency in the timer. When it detects a coincidence signal from the timer, it judges that the time has become the specified one and instructs the clock supply circuit by the first control signal to lower the frequency to the specified one and instructs the power-supply voltage supply circuit by the second signal to lower the power-supply voltage value to the obtained one.
As a result, the clock supply circuit switches the clock frequency and supplies a system clock lowered in frequency to the target circuit.
Further, the power-supply voltage supply circuit switches the power-supply voltage and supplies it to the target circuit.
When raising the system clock frequency at a predetermined time, the target circuit supplies a frequency change instruction including time information to the control means.
When the control means receives a frequency change instruction from the target circuit, it judges whether to perform an operation for increasing (raising) the frequency or an operation for decreasing (lowering) the frequency from the frequency instructed by the target circuit.
In this case, it judges that the change is one for raising the current frequency.
When raising the frequency, the control means has to raise the power-supply voltage before changing the frequency.
Thus, the control means obtains the power-supply voltage value to be supplied to the target circuit from the instructed frequency value, calculates the time to heighten (raise) the power-supply voltage from the time instructed by the target circuit, and sets this in the timer.
Then, when detecting a coincidence signal from the timer, it judges that the time has become the specified one and instructs the power-supply voltage supply circuit by the second signal to raise the power-supply voltage value to the obtained one.
Next, the control means sets the time to raise the frequency in the timer. Then, when detecting a coincidence signal from the timer, it judges that the time has become the specified one and instructs the clock supply circuit by the first control signal to raise the frequency to the instructed one.
As a result, the clock supply circuit switches the clock frequency and supplies a system clock raised in frequency to the target circuit.
Further, the power-supply voltage supply circuit switches the power-supply voltage and supplies it to the target circuit.
Also, according to the present invention, for example, when raising the frequency of the system clock to be supplied to the target circuit at a predetermined time, when the control means receives a frequency change instruction, it judges whether to perform an operation for increasing (raising) the frequency or an operation for decreasing (lowering) the frequency.
In this case, it judges that the change is one for raising the current frequency.
The control means instructs the clock pulse generation circuit by the control signal to raise the frequency of the clock for a frequency-voltage conversion circuit at an earlier time than a predetermined time.
As a result, the clock pulse generation circuit raises the clock frequency for the frequency-voltage conversion circuit.
Note that, at this time, for example, the control means set the time needed to raise the power-supply voltage by the frequency in the timer.
The frequency-voltage conversion circuit instructs the power-supply voltage generation circuit by a voltage instruction signal to raise the voltage since the power-supply voltage relative to the frequency is low.
Due to this, the power-supply voltage supplied to the target circuit and the frequency-voltage conversion circuit is converged to the power-supply voltage required for the frequency.
When the control means detects a coincidence signal from the timer, it instructs the clock pulse generation circuit by a control signal to raise the frequency of the system clock for the target circuit.
The clock pulse generation circuit receiving the instruction from the control means at a predetermined time raises the frequency of the system clock for the target circuit.
In this case, the power-supply voltage supplied to the target circuit changes to a high value, however since the target circuit operates in synchronization with the clock of the frequency and has a higher power-supply voltage than a required minimum power-supply voltage for the frequency, the operation thereof is assured.
When lowering the frequency of the system clock to be supplied to the target circuit at a predetermined time, the control means judges that the change is one for lowering the frequency.
Thus, the control means instructs the clock pulse generation circuit by a control signal to lower the frequency of the system clock to be supplied to the target circuit.
As a result, the clock pulse generation circuit lowers the frequency of the system clock for the target circuit.
Next, the control means instructs the clock pulse generation circuit by a control signal to lower the frequency of the clock for the frequency-voltage conversion circuit.
Consequently, the clock pulse generation circuit lowers the frequency of the clock for the frequency-voltage conversion circuit.
Note that if the clock pulse generation circuit is capable of switching the system clock to be supplied to the target circuit and the clock supplied to the frequency-voltage conversion circuit simultaneously, the two may be switched simultaneously.